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--- blog:386_shootout_umc [2021/02/09 15:45] – [Initial Thoughts] john
+++ blog:386_shootout_umc [2021/02/18 12:43] (current) – [Conclusion] john
@@ Line 4: / Line 4: @@
 A 386DX/486 motherboard acquired from an auction, with information, repairs, testing and benchmarks.
+**[Update 12/02/2021]** - The seller lost the motherboard, so this particular transaction wasn't completed.
 ===== Initial Thoughts =====
-The UMC UM82C481 seems to be a design from the middle of the 386 era; it has a compact chipset, but not quite the 1-chip solution of the very last boards, it has 8x 30pin SIMM sockets, sockets for up to 256KBytes of cache
+The UMC UM82C481 seems to be a design from the middle of the 386 era; it has a compact chipset, but not quite the 1-chip solution of the very last boards, it has 8x 30pin SIMM sockets, sockets for up to 256KBytes of cache as well as the later, compact, PLCC version of the AMD 386DX-40. It would have been one of the better 386 designs that you could have bought at the time.
+I got this board from a Russian-language auction site ([[https://streetmarket.ru/]]) in early February 2021 for a very reasonable amount of money. One of the reasons being that it had obvious damage...
 ==== Original Auction Images ====
@@ Line 13: / Line 17: @@
 {{:blog:223607710_4_.jpg?300|}} {{:blog:223607710_5_.jpg?300|}} {{:blog:223607710_3_.jpg?300|}}
+Items to note:
+   * The battery has leaked, but appears to be //relatively// contained
+   * **Battery leak:** on AT keyboard socket; needs to be desoldered and replaced
+   * **Battery leak:** on BIOS rom socket; needs to be desoldered and replaced, and EPROM cleaned (and backed up, preferably)
+   * **Battery leak:** around keyboard controller ; needs to be desoldered and cleaned
+   * **Battery leak:** possible evidence on first ISA slot
+   * Fitted with 4x //Winbond// W2457AK-20 SRAM chips 32kbx8 and 1x //Motorola// 8kbx8-15 tag SRAM, should be a total of 128KB of cache
+   * Soldered-on AMD 80386DX-40 processor
+   * Empty FPU socket
 ===== Motherboard Data & Variants =====
@@ Line 19: / Line 32: @@
 ^ Item           ^  ^
-| Form Factor    |  |
+| Form Factor    | Baby AT  |
-| Chipset        |  |
+| Chipset        | UMV UM82C481 / UMC82C482 |
 | Dimensions     |  |
-| Maximum RAM    |  |
+| Maximum RAM    | 8x 30pin SIMM; unknown capacity, but presumably 8x4MB to make 32MB |
-| Cache          |  |
+| Cache          | Yes; unknown capacity |
-| FPU            |  |
+| FPU            | Yes, PGA socket; 387 |
-| CPU Type       |  |
+| CPU Type       | 386 DX, PGA socket |
-| CPU Speeds     |  |
+| CPU Speeds     | 25,33,40MHz |
-| Expansion      |  |
+| Expansion      | 6x16bit, 1x8bit |
-Motherboard jumper settings can be found in the following locations:
-   *
+The UMC82C481 memory controller as fitted to this board supports the provision of UMB memory via **The Last Byte** memory manager. As noted in the file //chipset.doc//:
+> The following  chip  provides 256k of memory in eight 16k blocks
+> between C0000-DFFFF and two 64k blocks between E0000-FFFFF.
+>
+> - UM82C481 - From the UM82C480 50Mhz 80486 Chip Set
+  * {{ :blog:tlb_v220.zip |}}
+  * {{ :blog:tlb_v252.zip |}}
+These UMB regions can then be used to load drivers and TSR's high, using the //highdvr// and //hightsr// utility included with The Last Byte memory manager similar to the MS-DOS commands //devicehigh// and //loadhigh//.
 ===== Configuration =====
@@ Line 106: / Line 127: @@
-(Go back to the [[blog:286_pc|286 PC main page]])
+(Go back to the [[blog:386_pc|386 PC main page]])