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--- blog:transputer_tmb08_repair [2020/12/07 17:05] – [Testing] john
+++ blog:transputer_tmb08_repair [2020/12/09 08:29] (current) – [IO Speed Tuning] john
@@ Line 110: / Line 110: @@
 {{:blog:tmb08_jumpers.png?200|}}
-Initially I couldn't get it to work reliably at all
+Initially I couldn't get it to work reliably at all, with the ispy network identification tool incorrectly identifying my transputer modules, misnaming the T225 processor, etc. This was with the later v323 release:
 {{:blog:img20201207133306.jpg?500|}} {{:blog:img20201206125154.jpg?500|}}
+Ultimately I reinserted the card several times, test again, left it a couple of days, reinserted it and tried again - this time it worked; although I completely filled all the TRAM slots, so perhaps that was an issue?
 {{:blog:img20201207164901.jpg?500|}} {{:blog:img20201207164851.jpg?500|}}
+//In hindsight, later versions of the ispy tool (anything above v233.1) appear to vomit, repeatedly, when scanning my TMB08. If I stick to ispy v233, then everything is detected normally.//
+===== IO Speed Tuning =====
+The default link speed from the root transputer to the PC host is moderately low; in the order of **270-280KBytes/sec**. When I rewrote the Linux transputer driver for kernel 3.x.y I was getting approximately 100KBytes/sec more. Some of this could be down to the architecture of the host system (I was previously using a 200MHz Pentium Pro, rather than the current 133MHz 5x86/486), but it was pointed out to me that this could potentially be improved by tuning various BIOS options.
+  * Standard BIOS settings are:
+    * **1/4** Bus clock as ISA speed (33MHz/4 = 8.//something//)
+    * **8** clock cycles as 8bit ISA IO recovery time
+I tried a sequence of changing ISA clock and then 8bit IO recovery time, testing in between each change via //ispy// to verify host IO link speed. These are the results:
+{{:blog:tmb08_io_tuning.png?700|}}
+The first increase in IO speed comes from both increasing the ISA clock from the standard 8MHz (bus / 4) to 11MHz (bus / 3), which gains an additional **22-24KBytes/sec**, as well as decreasing the IO recovery time from the standard 8 cycles to 5 cycles, giving us another **32-33KBytes/sec**. Further decreases to the IO recovery time below 5 cycles __do not__ show any improvement.
+CPU level 1 and motherboard level 2 caches are already optimal (write-back supported on both) and memory timings are already set correctly for the type and speed of the modules installed, so there are no further gains to be made there.
+Still, the overall improvement from the base setting is approximately **55-56KBytes/sec**. __Taking us from 270-280KBytes/sec to 333KBytes/sec__.
+===== Transputer Network Configuration =====
+Now that the TMB08 is up and running, I need a way to network both this and my older, working Transtech TMB04 together.
+Fortunately the TMB08 brings out a load of Transputer 20Mbit connections to the 37-way D-connector on the card. This allows you to physically connect multiple cards and multiple transputer networks together.
+The TMB08 has 10 slots on the cards, with each slot being able to be software configured to other slots by the onboard C004 programmable switch. The switch also has enough free 'ports' to have up to 10 extra links on the D-connector. This is useful as the TMB04 has one onboard Transputer, plus another 4 slots - none of which are linked together; so that's 5 connections needed right there (unless we connect all the slots on the TMB04 together as a simple pipe, which isn't the best use of the available topologies).
+Here's the physical connections that I //think// are needed from a single TMB08 working as master, with a TMB04 as a slave with all 5 transputers on the TMB04 connected independently:
+{{:blog:transputer_network_-_tmb08_tmb04.png?600|}}
+This still leaves 3 pairs of Transputer links available in case I add several more cards.
+If connecting to another C004 managed card (like a real Inmos B008, or another TMB08), then you also need to connect //pipetail// and //configdown//, as noted in the Transtech manual.